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    CDES
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    Delay-Insensitive Ternary Logic
    14 years 11 months ago
    Delay-Insensitive Ternary Logic
    Download  comp.uark.edu
    This paper develops a delay-insensitive (DI) digital design paradigm that utilizes ternary logic as an alternative to dual-rail logic for encoding the DATA and NULL states. This ne...
    Ravi Sankar Parameswaran Nair, Scott C. Smith, Jia...
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    100
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    CDES
    2009
    170views Hardware» more  CDES 2009»
    Benchmarking GPU Devices with N-Body Simulations
    14 years 11 months ago
    Benchmarking GPU Devices with N-Body Simulations
    Download  tur-www1.massey.ac.nz
    Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
    Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...
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