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FPL
2006
Springer
223views Hardware» more  FPL 2006»
15 years 2 months ago
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
Carlos Morra, M. Sackmann, Sunil Shukla, Jürg...
GECCO
2006
Springer
137views Optimization» more  GECCO 2006»
15 years 2 months ago
A unified optimization framework for microelectronics industry
In this paper, an object-oriented unified optimization framework (UOF) for general problem optimization is proposed. Based on evolutionary algorithms, numerical deterministic meth...
Yiming Li, Cheng-Kai Chen, Yen-Yu Cho
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AAAI
2006
15 years 16 days ago
Script and Language Identification in Degraded and Distorted Document Images
This paper reports a statistical identification technique that differentiates scripts and languages in degraded and distorted document images. We identify scripts and languages th...
Shijian Lu, Chew Lim Tan
AIA
2006
15 years 15 days ago
Tree Model of Symbolic Music for Tonality Guessing
Most of the western tonal music is based on the concept of tonality or key. It is often desirable to know the tonality of a song stored in a symbolic format (digital scores), both...
David Rizo, José Manuel Iñesta Quere...
CDES
2006
136views Hardware» more  CDES 2006»
15 years 15 days ago
Using Task Recomputation During Application Mapping in Parallel Embedded Architectures
- Many memory-sensitive embedded applications can tolerate small performance degradations if doing so can reduce the memory space requirements significantly. This paper explores th...
Suleyman Tosun, Mahmut T. Kandemir, Hakduran Koc