This paper describes an on-chip programmable bias current generator, intended for mixed signal chips requiring a wide ranging set of currents. The individual generators share a ma...
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...
Stride-based prefetching mechanisms exploit regular streams of memory accesses to hide memory latency. While these mechanisms are effective, they can be improved by studying the p...
Software systems often undergo many revisions during their lifetime as new features are added, bugs repaired, abstractions simplified and refactored, and performance improved. Wh...
for reasoning about abstract models of protocols. The work on informal methods attempts to discern common patterns in the extensive record of flawed protocols, and to formulate po...