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138
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ICIP
2007
IEEE
16 years 5 months ago
Unequal Length First-Order Linear-Phase Filter Banks for Efficient Image Coding
In this paper, we present the structure and design method for a firstorder linear-phase filter bank (FOLPFB) which has unequal filter lengths in its synthesis bank (UFLPFB). A FOL...
Yuichi Tanaka, Masaaki Ikehara, Truong Q. Nguyen
138
Voted
DCC
2007
IEEE
16 years 3 months ago
Multiple Description Coding for Stationary and Ergodic Sources
We consider the problem of multiple description (MD) coding for stationary sources with the squared error distortion measure. The MD rate region is derived for the stationary and ...
Jun Chen, Chao Tian, Suhas N. Diggavi
128
Voted
FCCM
2007
IEEE
154views VLSI» more  FCCM 2007»
15 years 10 months ago
Code Compressor and Decompressor for Ultra Large Instruction Width Coarse-Grain Reconfigurable Systems
This paper presents a code compression and on-thefly decompression scheme suitable for coarse-grain reconfigurable technologies. A novel unit-grouping dictionary based compression...
Nazish Aslam, Mark Milward, Ioannis Nousias, Tughr...
101
Voted
ICC
2007
IEEE
147views Communications» more  ICC 2007»
15 years 10 months ago
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax
— We present a new multi-rate architecture for decoding irregular LDPC codes in IEEE 802.16e WiMax standard. The proposed architecture utilizes the value–reuse property of offs...
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Moha...
114
Voted
ICCCN
2007
IEEE
15 years 10 months ago
Serial Sum-Product Architecture for Low-Density Parity-Check Codes
—A serial sum-product architecture for low-density parity-check (LDPC) codes is presented. In the proposed architecture, a standard bit node processing unit computes the bit to c...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...