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CJ
2006
84views more  CJ 2006»
15 years 4 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
EUROSYS
2008
ACM
16 years 1 months ago
Flicker: an execution infrastructure for tcb minimization
We present Flicker, an infrastructure for executing securitysensitive code in complete isolation while trusting as few as 250 lines of additional code. Flicker can also provide me...
Jonathan M. McCune, Bryan Parno, Adrian Perrig, Mi...
EUROSYS
2008
ACM
16 years 1 months ago
Documenting and automating collateral evolutions in linux device drivers
The internal libraries of Linux are evolving rapidly, to address new requirements and improve performance. These evolutions, however, entail a massive problem of collateral evolut...
Yoann Padioleau, Julia L. Lawall, René Rydh...
CGO
2008
IEEE
15 years 11 months ago
Cole: compiler optimization level exploration
Modern compilers implement a large number of optimizations which all interact in complex ways, and which all have a different impact on code quality, compilation time, code size,...
Kenneth Hoste, Lieven Eeckhout
COMPSAC
2008
IEEE
15 years 11 months ago
Ontology Model-Based Static Analysis on Java Programs
1 Typical enterprise and military software systems consist of millions of lines of code with complicated dependence on library abstractions. Manually debugging these codes imposes ...
Lian Yu, Jun Zhou, Yue Yi, Ping Li, Qianxiang Wang