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DAC
2000
ACM
16 years 6 months ago
Efficient variable ordering using aBDD based sampling
Variable ordering for BDDs has been extensively investigated. Recently, sampling based ordering techniques have been proposed to overcome problems with structure based static orde...
Yuan Lu, Jawahar Jain, Edmund M. Clarke, Masahiro ...
DAC
2000
ACM
16 years 6 months ago
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, And...
DAC
2000
ACM
16 years 6 months ago
Symbolic timing simulation using cluster scheduling
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
Clayton B. McDonald, Randal E. Bryant
DAC
2000
ACM
16 years 6 months ago
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter
This paper presents a D/A converter with a 14-bit intrinsic linearity in 0.5?m CMOS technology, which has been designed using a systematic design methodology for current-steering ...
Geert Van der Plas, Jan Vandenbussche, Walter Daem...
DAC
2000
ACM
16 years 6 months ago
Dynamic noise analysis in precharge-evaluate circuits
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...
Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Y...