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VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
16 years 3 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
16 years 3 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
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Voted
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
16 years 3 months ago
Low Power Solution for Wireless Applications
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
Sornavalli Ramanathan, Rituparna Mandal
HICSS
2002
IEEE
91views Biometrics» more  HICSS 2002»
15 years 8 months ago
Neuroimaging Studies Give New Insight to Mental Rotation
This paper summarizes the recent findings of mental rotation studies which use neuroimaging techniques. Though many results differed, almost all the reviewed studies concurred tha...
Wendy S. Ark
RTS
2002
106views more  RTS 2002»
15 years 2 months ago
Cello: A Disk Scheduling Framework for Next Generation Operating Systems
In this paper, we present the Cello disk scheduling framework for meeting the diverse service requirements of applications. Cello employs a two-level disk scheduling architecture,...
Prashant J. Shenoy, Harrick M. Vin