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163
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DATE
2007
IEEE
16 years 17 days ago
2007
IEEE
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
173
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DATE
2007
IEEE
16 years 17 days ago
2007
IEEE
In this paper, we propose a novel statistical model order reduction technique, called statistical spectrum model order reduction (SSMOR) method, which considers both intra-die and...
158
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DATE
2007
IEEE
16 years 17 days ago
2007
IEEE
The storage requirements of the array-dominated and looporganized algorithmic specifications running on embedded systems can be significant. Employing a data memory space much l...
145
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DATE
2007
IEEE
16 years 17 days ago
2007
IEEE
Extreme transistor scaling trends in silicon technology are soon to reach a point where manufactured systems will suffer from limited device reliability and severely reduced life...
137
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DFT
2007
IEEE
16 years 17 days ago
2007
IEEE
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...