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IEEEPACT
2007
IEEE
15 years 11 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
IEEEPACT
2007
IEEE
15 years 11 months ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...
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IEEEPACT
2007
IEEE
15 years 11 months ago
Component-Based Lock Allocation
The allocation of lock objects to critical sections in concurrent programs affects both performance and correctness. Recent work explores automatic lock allocation, aiming primari...
Richard L. Halpert, Christopher J. F. Pickett, Cla...
IEEEPACT
2007
IEEE
15 years 11 months ago
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
Brian Greskamp, Josep Torrellas
IEEEPACT
2007
IEEE
15 years 11 months ago
Unified Architectural Support for Soft-Error Protection or Software Bug Detection
In this paper we propose a unified architectural support that can be used flexibly for either soft-error protection or software bug detection. Our approach is based on dynamically...
Martin Dimitrov, Huiyang Zhou
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