In this paper we introduce concepts of a potential fault latency and a real fault latency for Finite State Machines (FSMs). The potential latency defines a minimal value of the po...
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
Conventionally, mobile robots are controlled through an action selection mechanism (ASM) that chooses among multiple proposed actions. This choice can be made in a variety of ways...
Brian P. Gerkey, Maja J. Mataric, Gaurav S. Sukhat...
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
Embedded systems require control of many concurrent real-time activities, leading to system designs which feature multiple hardware peripherals with each providing a specific, ded...