116 search results - page 7 / 24 » concurrency 2011 |
141
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ASAP
2011
IEEE
2011
IEEE
High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder
13 years 9 months ago
—To meet the higher data rate requirement of emerging wireless communication technology, numerous parallel turbo decoder architectures have been developed. However, the interleav...
CORR
2011
Springer
14 years 1 months ago
2011
Springer
With the recent technological feasibility of electronic commerce over the Internet, much attention has been given to the design of electronic markets for various types of electron...
174
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GLVLSI
2011
IEEE
14 years 1 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
ASPLOS
2011
ACM
14 years 1 months ago
2011
ACM
Concurrency bugs are caused by non-deterministic interleavings between shared memory accesses. Their effects propagate through data and control dependences until they cause softwa...
101
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EUROSYS
2011
ACM
14 years 28 days ago
2011
ACM
Parallel software is increasingly necessary to take advantage of multi-core architectures, but it is also prone to concurrency bugs which are particularly hard to avoid, find, an...