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ICPADS
2005
IEEE
15 years 3 months ago
Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems
Low energy consumptions are extremely important in real-time embedded systems, and scheduling is one of the techniques used to obtain lower energy consumptions. In this paper, we ...
Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bi...
118
Voted
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
15 years 3 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
VMCAI
2005
Springer
15 years 2 months ago
Minimizing Counterexample with Unit Core Extraction and Incremental SAT
Abstract. It is a hotly researching topic to eliminate irrelevant variables from counterexample, to make it easier to be understood. K Ravi proposes a two-stages counterexample min...
ShengYu Shen, Ying Qin, Sikun Li
63
Voted
CODES
2005
IEEE
15 years 3 months ago
The design of a smart imaging core for automotive and consumer applications: a case study
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two spe...
Wido Kruijtzer, Winfried Gehrke, Víctor Rey...
LCPC
2005
Springer
15 years 2 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...