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ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
15 years 1 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
CAS
2005
109views more  CAS 2005»
14 years 11 months ago
Bringing Up Robot: Fundamental Mechanisms For Creating A Self-Motivated, Self-Organizing Architecture
In this paper we propose an intrinsic developmental algorithm that is designed to allow a mobile robot to incrementally progress through levels of increasingly sophisticated behav...
Douglas S. Blank, Deepak Kumar, Lisa Meeden, James...
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
15 years 5 months ago
A 16-bit low-power microcontroller with monolithic MEMS-LC clocking
Abstract—Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chi...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
ICCAD
2005
IEEE
101views Hardware» more  ICCAD 2005»
15 years 8 months ago
Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variat
In this paper we propose a novel parameterized interconnect order reduction algorithm, CORE, to efficiently capture both inter-die and intra-die variations. CORE applies a two-ste...
Xin Li, Peng Li, Lawrence T. Pileggi
ATS
2005
IEEE
91views Hardware» more  ATS 2005»
15 years 5 months ago
SOC Test Scheduling with Test Set Sharing and Broadcasting
11 Due to the increasing test data volume needed to test corebased System-on-Chip, several test scheduling techniques minimizing the test application time have been proposed. In co...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...