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69
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DATE
2005
IEEE
107views Hardware» more  DATE 2005»
15 years 3 months ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
80
Voted
DATE
2005
IEEE
104views Hardware» more  DATE 2005»
15 years 3 months ago
Queue Management in Network Processors
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 3 months ago
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach
— A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques th...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...
DFMA
2005
IEEE
151views Multimedia» more  DFMA 2005»
15 years 3 months ago
MUMOC: An Active Infrastructure for Open Video Caching
Advances in networking and content delivery systems are enabling new challenging provisioning scenarios where a growing number of users access Video on Demand (VoD), possibly whil...
Paolo Bellavista, Antonio Corradi, Luca Foschini
FCCM
2005
IEEE
102views VLSI» more  FCCM 2005»
15 years 3 months ago
A Signature Match Processor Architecture for Network Intrusion Detection
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructu...
Janardhan Singaraju, Long Bu, John A. Chandy