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ISPAN
2005
IEEE
15 years 3 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
ISPASS
2005
IEEE
15 years 3 months ago
Reaping the Benefit of Temporal Silence to Improve Communication Performance
Communication misses--those serviced by dirty data in remote caches--are a pressing performance limiter in shared-memory multiprocessors. Recent research has indicated that tempor...
Kevin M. Lepak, Mikko H. Lipasti
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 3 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
RTCSA
2005
IEEE
15 years 3 months ago
Extending Software Communications Architecture for QoS Support in SDR Signal Processing
The Software Communications Architecture (SCA) defined by Joint Tactical Radio Systems (JTRS) is the de facto standard middleware currently adopted by the Software Defined Radio (...
Jaesoo Lee, Jiyong Park, Seunghyun Han, Seongsoo H...
VISUALIZATION
2005
IEEE
15 years 3 months ago
Topology-driven Surface Mappings with Robust Feature Alignment
Topological concepts and techniques have been broadly applied in computer graphics and geometric modeling. However, the homotopy type of a mapping between two surfaces has not bee...
Christopher Carner, Miao Jin, Xianfeng Gu, Hong Qi...