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ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
Based on a timing yield model, a statistical static timing analysis technique is proposed. This technique preserves existing methodology by selecting a “device file setting” ...
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
We discuss a new synthesis flow, which offers the ability to do easy delay testing almost free in terms of its impact on speed and area as compared to corresponding implementation...