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CSREAESA
2006
15 years 11 days ago
2006
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
CSREAESA
2003
15 years 10 days ago
2003
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
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CSREAESA
2003
15 years 10 days ago
2003
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
CSREAESA
2009
15 years 1 days ago
2009
: Space is a hazardous environment for both man and machine and to explore such a terrain a rugged, yet easily implementable, platform is needed. Low-cost, low-power embedded syste...
CSREAESA
2007
15 years 12 days ago
2007
—Current industrial automation systems are virtually unprotected against attacks on IT security at field level, especially if an attacker is able to connect physically to field...