In this paper we propose algorithms for performing DRC on a bitmapped layout altd developspecial purpose architecture for its implementation. we Use window scan method, with flexib...
We present a new 0 (n2) heuristic for hypergraph min-cut bipartitioning, an important problem in circuit placement. Fastest previous methods for this problem are O(n2 log n). Our ...
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
We present an accurate and efficient method for extraction of parasitic capacitances in submicron integrated circuits. The method uses a 3-D finite element model in which the cond...