In many computer-aided design tools, binary decision diagrams (BDDs) are used to represent Boolean functions. To increase the efficiency and capability of these tools, many algor...
Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenn...
- This paper presents an effective technique for compacting a large sequence of input vectors into a much smaller one such that when the two sequences are applied to any circuit, t...
This paper presents a new scan-based BIST scheme which achieves very high fault coverage without the deficiencies of previously proposed schemes. This approach utilizes scan order...
Kun-Han Tsai, Sybille Hellebrand, Janusz Rajski, M...
Extracting the inductance of complex interconnect topologies is a formidable task, and simulating the resulting dense partial inductance matrix is even more difficult. Furthermore...
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...