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DAC
1999
ACM
15 years 1 months ago
Buffer Insertion with Accurate Gate and Interconnect Delay Computation
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
DAC
1999
ACM
15 years 1 months ago
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
DAC
1999
ACM
15 years 1 months ago
A Practical Approach to Multiple-Class Retiming
Retiming is an optimization technique for synchronous circuits introduced by Leiserson and Saxe in 1983. Although powerful, retiming is not very widely used because it does not ha...
Klaus Eckl, Jean Christophe Madre, Peter Zepter, C...
DAC
1999
ACM
15 years 1 months ago
On ILP Formulations for Built-In Self-Testable Data Path Synthesis
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...
Han Bin Kim, Dong Sam Ha, Takeshi Takahashi
DAC
1999
ACM
15 years 1 months ago
Model Order-Reduction of RC(L) Interconnect Including Variational Analysis
As interconnect feature sizes continue to scale to smaller dimensions, long interconnect can dominate the IC timing performance, but the interconnect parameter variations make it ...
Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas