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DAC
2002
ACM
16 years 1 months ago
Deriving a simulation input generator and a coverage metric from a formal specification
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
Kanna Shimizu, David L. Dill
DAC
2002
ACM
16 years 1 months ago
A factorization-based framework for passivity-preserving model reduction of RLC systems
We present a framework for passivity-preserving model reduction for RLC systems that includes, as a special case, the well-known PRIMA model reduction algorithm. This framework pr...
Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh
157
Voted
DAC
2002
ACM
16 years 1 months ago
A comparison of three verification techniques: directed testing, pseudo-random testing and property checking
This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bris...
Mike Bartley, Darren Galpin, Tim Blackmore
DAC
2002
ACM
16 years 1 months ago
An optimal voltage synthesis technique for a power-efficient satellite application
This paper presents an optimal voltage synthesis technique for a satellite application to maximize system performance subject to energy budget. A period of a satellite's orbi...
Dong-In Kang, Jinwoo Suh, Stephen P. Crago
90
Voted
DAC
2002
ACM
16 years 1 months ago
False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation
We propose a false-path-aware statistical timing analysis framework. In our framework, cell as well as interconnect delays are assumed to be correlated random variables. Our tool ...
Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ti...