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DAC
2003
ACM
15 years 10 months ago
Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay ...
ISCAS
2003
IEEE
99views Hardware» more  ISCAS 2003»
15 years 2 months ago
Continuous-time, frequency translating, bandpass delta-sigma modulator
This paper introduces the concept of frequency-translating, bandpass delta-sigma modulator in continuous-time. The system level design and simulation results of the deltasigma mod...
Anurog Pulincherry, Mike Hufford, Eric Naviasky, U...
DAC
2003
ACM
15 years 10 months ago
Checking satisfiability of a conjunction of BDDs
Procedures for Boolean satis ability most commonly work with Conjunctive Normal Form. Powerful SAT techniques based on implications and con icts can be retained when the usual CNF...
Robert F. Damiano, James H. Kukula