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117
Voted
DAC
2007
ACM
16 years 6 months ago
2007
ACM
This paper describes a family of novel dynamically reconfigurable logic gates based on double-gate carbon nanotube field-effect transistors which demonstrate p-type or n-type switc...
110
Voted
ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
－ This paper presents a 2GS/s 10-bit CMOS digital-to-analog converter (DAC). This DAC consists of a unit current-cell matrix for 6MSBs and another unit current-cell matrix for 4L...
123
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DAC
2007
ACM
16 years 6 months ago
2007
ACM
A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in ...
126
Voted
ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
Abstract—This paper presents a high-speed digital feedforward Delta-Sigma Modulator which relaxes timing requirement for the Dynamic Element Matching (DEM) algorithm. By making t...
145
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DAC
2007
ACM
15 years 9 months ago
2007
ACM
Using FPGAs, a designer can separate the design process from the manufacturing flow. Therefore, the owner of a sensitive design need not expose the design to possible theft and ta...