We present a novel technique for Sequential Equivalence Checking (SEC) between non-cycle-accurate designs. The problem is routinely encountered in verifying the correctness of a s...
— Digital signal processing applications often require the computation of linear systems. These computations can be considerably expensive and require optimizations for lower pow...
Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan F...
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
Andrei Hagiescu, Weng-Fai Wong, David F. Bacon, Ro...
Traditional debug methodologies are limited in their ability to provide debugging support for many-core parallel programming. Synchronization problems or bugs due to race conditio...
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan P...
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...