102 search results - page 4 / 21 » date 1998 |
DATE
1998
IEEE
15 years 1 months ago
1998
IEEE
Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at...
ACTA
1998
14 years 9 months ago
1998
We will give a survey on results related to scheduling problems where machines are not continuously available for processing. We will deal with single and multi machine problems an...
DATE
1998
IEEE
15 years 1 months ago
1998
IEEE
1 Redundancy removal is an important step in combinational logic optimization. After a redundant wire is removed, other originally redundant wires may become irredundant, and some ...
DATE
1998
IEEE
15 years 1 months ago
1998
IEEE
This paper presents a zero-skew gated clock routing technique for VLSI circuits. The gated clock tree has masking gates at the internal nodes of the clock tree, which are selectiv...
DATE
1998
IEEE
15 years 1 months ago
1998
IEEE
We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact so...