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DATE
1998
IEEE
74views Hardware» more  DATE 1998»
15 years 1 months ago
State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
Michael S. Hsiao, Srimat T. Chakradhar
DATE
1998
IEEE
100views Hardware» more  DATE 1998»
15 years 1 months ago
Combinational Verification based on High-Level Functional Specifications
We present a new combinational verification technique where the functional specification of a circuit under verification is utilized to simplify the verification task. The main id...
Evguenii I. Goldberg, Yuji Kukimoto, Robert K. Bra...
DATE
1998
IEEE
106views Hardware» more  DATE 1998»
15 years 1 months ago
March Tests for Word-Oriented Memories
Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e....
A. J. van de Goor, Issam B. S. Tlili
DATE
1998
IEEE
108views Hardware» more  DATE 1998»
15 years 1 months ago
Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin...
DATE
1998
IEEE
116views Hardware» more  DATE 1998»
15 years 1 months ago
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform
This paper presents a VLSI Architecture to implement the forward and inverse 2-D Discrete Wavelet Transform (FDWT/IDWT), to compress medical images for storage and retrieval. Loss...
Isidoro Urriza, José I. Artigas, José...