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2003
IEEE
89views Hardware» more  DATE 2003»
15 years 3 months ago
A New Crosstalk Noise Model for DOMINO Logic Circuits
A new crosstalk noise model is proposed for DOMINO logic gates. Our noise model takes the effect of keeper into account and provides more accurate noise measure.
Seung Hoon Choi, Kaushik Roy
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DATE
2003
IEEE
152views Hardware» more  DATE 2003»
15 years 3 months ago
Bluetooth Transceiver Design with VHDL-AMS
This paper describes the design challenges of BlueTraCTM , a low-cost, low-power radio transceiver and the usage of mixed-signal/mixed-mode techniques and behavioral modeling with...
Rami Ahola, Daniel Wallner, Marius Sida
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
15 years 3 months ago
Library Functions Timing Characterization for Source-Level Analysis
Execution time estimation of software at source-level is nowadays a crucial phase of the system design flow, especially for portable devices and real-time systems. From a source-...
Carlo Brandolese, William Fornaciari, Fabio Salice...
DATE
2003
IEEE
80views Hardware» more  DATE 2003»
15 years 3 months ago
Implementation and Evaluation of an On-Demand Parameter-Passing Strategy for Reducing Energy
In this paper, we present an energy-aware parameterpassing strategy called on-demand parameter-passing. The objective of this strategy is to eliminate redundant actual parameter e...
Mahmut T. Kandemir, Ibrahim Kolcu, Wei Zhang 0002
DATE
2003
IEEE
89views Hardware» more  DATE 2003»
15 years 3 months ago
Heterogeneous Programmable Logic Block Architectures
In this poster, we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and...
Aneesh Koorapaty, Vikas Chandra, K. Y. Tong, Cheta...