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DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
Abstract : A novel design methodology for test pattern generation in BIST is presented. Here faults and errors in the generator itself are detected. Two different design methodolog...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
We present a physical imrplementation of a 32-ports SPIN micro-network. For a 0.13 micron CMOS process, the total area is 4.6 ¢£¢¥¤ , for a cumulated bandwidth of about 100 G...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
With the widespread use of embedded devices such as PDAs, printers, game machines, cellular telephones, achieving high performance demands an optimized operating system (OS) that ...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper introduces an efficient multithreaded synchronous dataflow (SDF) scheduler that can significantly reduce the running time of multi-rate SDF simulations on multiprocesso...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
Built-In Self-Test (BIST) becomes important also for more complex structures like complete front-ends. In order to bring down the costs for the test overhead, Spectral Signature A...