1 We present an approach to schedulability analysis for the synthesis of multi-cluster distributed embedded systems consisting of timetriggered and event-triggered clusters, interc...
In this paper we present a microprocessor-based approach suitable for embedded flash memory testing in a System-on-achip (SOC) environment. The main novelty of the approach is the...
Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza ...
We present a framework (Real-Time Calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requiremen...
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
Marcello Coppola, Stephane Curaba, Miltos D. Gramm...
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...