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2003
IEEE
86views Hardware» more  DATE 2003»
15 years 3 months ago
PLFire: A Visualization Tool for Asynchronous Phased Logic Designs
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...
Kenneth Fazel, Mitchell A. Thornton, Robert B. Ree...
DATE
2003
IEEE
105views Hardware» more  DATE 2003»
15 years 3 months ago
Approximation Approach for Timing Jitter Characterization in Circuit Simulators
A new computational concept of timing jitter is proposed that is suitable for exploitation in circuit simulators. It is based on the approximation of computed noise characteristic...
Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulya...
62
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DATE
2003
IEEE
95views Hardware» more  DATE 2003»
15 years 3 months ago
A New Simulation Technique for Periodic Small-Signal Analysis
A new numerical technique for periodic small signal analysis based on harmonic balance method is proposed. Special-purpose numerical procedures based on Krylov subspace methods ar...
Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulya...
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
15 years 3 months ago
Combined FDTD/Macromodel Simulation of Interconnected Digital Devices
Behavioral models of digital devices based on Radial Basis Functions (RBF) are incorporated into a Finite-Difference Time-Domain (FDTD) solver for full-wave analysis of interconne...
Stefano Grivet-Talocia, Igor S. Stievano, Ivan A. ...
78
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DATE
2003
IEEE
94views Hardware» more  DATE 2003»
15 years 3 months ago
Platform-Based Testbench Generation
This paper presents a new technology that accelerates system verification. In a real life example, we achieved a speed-up of a factor of about 5000. The key for this speed-up is a...
Renate Henftling, Andreas Zinn, Matthias Bauer, Wo...