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2003
IEEE
108views Hardware» more  DATE 2003»
15 years 3 months ago
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder
In this paper, we propose an optimized real-time MPEG-2 video decoder. The decoder has been implemented in one FPGA device as a HW/SW partitioned system. We made time/power-consum...
Matjaz Verderber, Andrej Zemva, Damjan Lampret
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
15 years 3 months ago
Power/Ground Mesh Area Optimization Using Multigrid-Based Technique
In this paper, we present a novel multigrid-based technique for power/ground mesh area optimization subject to reliability constraints. The multigrid-based technique is applied to...
Kai Wang, Malgorzata Marek-Sadowska
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
15 years 3 months ago
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
Jingcao Hu, Radu Marculescu
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DATE
2003
IEEE
119views Hardware» more  DATE 2003»
15 years 3 months ago
Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device
We are investigating an integrated design method for a device driver and a device in order to efficiently develop device drivers used in embedded systems. This paper evaluates wh...
Shinya Honda, Hiroaki Takada
DATE
2003
IEEE
159views Hardware» more  DATE 2003»
15 years 3 months ago
Model-Order Reduction Based on PRONY's Method
A new model-order reduction technique for linear dynamic systems is presented. The idea behind this technique is to transform the dynamic system function from the s-domain into th...
Makram M. Mansour, Amit Mehrotra