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2003
IEEE
94views Hardware» more  DATE 2003»
15 years 3 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
DATE
2003
IEEE
93views Hardware» more  DATE 2003»
15 years 3 months ago
Comparison of Test Pattern Decompression Techniques
Test pattern decompression techniques are bounded with the algorithm of test pattern ordering and test data flow controlling. Some of the methods could have more sophisticated sor...
Ondrej Novák
65
Voted
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 3 months ago
Virtual Compression through Test Vector Stitching for Scan Based Designs
We propose a technique for compressing test vectors. The technique reduces test application time and tester memory requirements by utilizing part of the predecessor response in co...
Wenjing Rao, Alex Orailoglu
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 3 months ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
86
Voted
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 3 months ago
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
Wei Qin, Sharad Malik