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2004
IEEE
129views Hardware» more  DATE 2004»
15 years 1 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
DATE
2004
IEEE
103views Hardware» more  DATE 2004»
15 years 1 months ago
A Novel Implementation of Tile-Based Address Mapping
Tile-based data layout has been applied to achieve various objectives such as minimizing cache conflicts and memory row switching activity. In some applications of tilebased mappi...
Sambuddhi Hettiaratchi, Peter Y. K. Cheung
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 1 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
DATE
2004
IEEE
159views Hardware» more  DATE 2004»
15 years 1 months ago
Compositional Memory Systems for Data Intensive Applications
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set ba...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
DATE
2004
IEEE
117views Hardware» more  DATE 2004»
15 years 1 months ago
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks
We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous...
Mohammad Reza Mousavi, Paul Le Guernic, Jean-Pierr...