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2005
IEEE
150views Hardware» more  DATE 2005»
15 years 3 months ago
Pueblo: A Modern Pseudo-Boolean SAT Solver
This paper introduces a new SAT solver that integrates logicbased reasoning and integer programming methods to systems of CNF and PB constraints. Its novel features include an eff...
Hossein M. Sheini, Karem A. Sakallah
DATE
2005
IEEE
102views Hardware» more  DATE 2005»
15 years 3 months ago
New Schemes for Self-Testing RAM
This paper gives an overview of a new technique, named pseudo-ring testing (PRT). PRT can be applied for testing wide type of random access memories (RAM): bitor word-oriented and...
Ghenadie Bodean, D. Bodean, A. Labunetz
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
15 years 3 months ago
FPGA based Agile Algorithm-On-Demand Co-Processor
With growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile ...
Ramachandran Pradeep, S. Vinay, Sanjay Burman, V. ...
DATE
2005
IEEE
105views Hardware» more  DATE 2005»
15 years 3 months ago
Mutation Sampling Technique for the Generation of Structural Test Data
Our goal is to produce validation data that can be used as an efficient (pre) test set for structural stuck-at faults. In this paper, we detail an original test-oriented mutation ...
Mathieu Scholivé, Vincent Beroulle, Chantal...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
15 years 3 months ago
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip
In this paper is proposed a technique to integrate and simulate a dynamic memory in a multiprocessor framework based on C/C++/SystemC. Using host machine’s memory management cap...
Oreste Villa, Patrick Schaumont, Ingrid Verbauwhed...