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2005
IEEE
116views Hardware» more  DATE 2005»
15 years 3 months ago
Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition
This paper addresses two problems related to disjointsupport decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results...
Andrés Martinelli, Elena Dubrova
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
15 years 3 months ago
Structural Testing Based on Minimum Kernels
Structural testing techniques, such as statement and branch coverage, play an important role in improving dependability of software systems. However, finding a set of tests which...
Elena Dubrova
DATE
2005
IEEE
131views Hardware» more  DATE 2005»
15 years 2 days ago
Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions
— We propose a sensitivity-based method to allocate decaps incorporating leakage constraints and tighter data and clock interactions. The proposed approach attempts to allocate d...
Ajith Chandy, Tom Chen
DATE
2005
IEEE
99views Hardware» more  DATE 2005»
15 years 3 months ago
A New System Design Methodology for Wire Pipelined SoC
Wire Pipelining (WP) has been proposed in order to limit the impact of increasing wire delays. In general, the added pipeline elements alters the system such that architectural ch...
Mario R. Casu, Luca Macchiarulo
DATE
2005
IEEE
187views Hardware» more  DATE 2005»
15 years 3 months ago
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs
In this paper, the application of a cycle accurate binary translator for rapid prototyping of SoCs will be presented. This translator generates code to run on a rapid prototyping ...
Jürgen Schnerr, Oliver Bringmann, Wolfgang Ro...