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2005
IEEE
100views Hardware» more  DATE 2005»
15 years 3 months ago
Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis
In signal integrity analysis, the joint effect of propagated noise through library cells, and of the noise injected on a quiet net by neighboring switching nets through coupling c...
Cristiano Forzan, Davide Pandini
DATE
2005
IEEE
165views Hardware» more  DATE 2005»
15 years 3 months ago
Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...
Francesco Poletti, Antonio Poggiali, Paul Marchal
DATE
2005
IEEE
119views Hardware» more  DATE 2005»
15 years 3 months ago
On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips
Multi-site testing is a popular and effective way to increase test throughput and reduce test costs. We present a test throughput model, in which we focus on wafer testing, and co...
Sandeep Kumar Goel, Erik Jan Marinissen
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DATE
2005
IEEE
131views Hardware» more  DATE 2005»
15 years 3 months ago
Unified Modeling of Complex Real-Time Control Systems
Complex real-time control system is a software dense and algorithms dense system, which needs modern software engineering techniques to design. UML is an object-oriented industria...
He Hai, Zhong Yi-fang, Cai Chi-lan
DATE
2005
IEEE
112views Hardware» more  DATE 2005»
15 years 3 months ago
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques
In this paper we present arithmetic real-coded variation operators tailored for time slot and turn optimization on TDMA-scheduled resources with evolutionary algorithms. Our opera...
Arne Hamann, Rolf Ernst