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DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
Generation of n -detection test sets is typically done for a single fault model. In this work we investigate the generation of n -detection test sets by pairing each fault of a ta...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
Abstract— 3D circuits have the potential to improve performance over traditional 2D circuits by reducing wirelength and interconnect delay. One major problem with 3D circuits is ...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
1 This paper presents a test scheduling approach for system-onchip production tests with peak-power constraints. An abort-onfirst-fail test approach is assumed, whereby the test is...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
In this paper, we present an extension to existing approaches that capture and exploit timing-correlation between tasks for scheduling analysis in distributed systems. Previous ap...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
The impact of test conditions on the detectability of open defects is investigated. We performed an inductive fault analysis on representative standard gates. The simulation resul...