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2006
IEEE
76views Hardware» more  DATE 2006»
15 years 4 months ago
Performance optimization for energy-aware adaptive checkpointing in embedded real-time systems
Using additional store-checkpoinsts (SCPs) and compare-checkpoints (CCPs), we present an adaptive checkpointing for double modular redundancy (DMR) in this paper. The proposed app...
Zhongwen Li, Hong Chen, Shui Yu
73
Voted
DATE
2006
IEEE
66views Hardware» more  DATE 2006»
15 years 4 months ago
Power/performance hardware optimization for synchronization intensive applications in MPSoCs
This paper explores optimization techniques of the synchronization mechanisms for MPSoCs based on complex interconnect (Network-on-Chip), targeted at future powerefficient system...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 4 months ago
Test compaction for transition faults under transparent-scan
Transparent-scan was proposed as an approach to test generation and test compaction for scan circuits. Its effectiveness was demonstrated earlier in reducing the test application ...
Irith Pomeranz, Sudhakar M. Reddy
DATE
2006
IEEE
121views Hardware» more  DATE 2006»
15 years 4 months ago
Analysis of the impact of bus implemented EDCs on on-chip SSN
In this paper we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN...
Daniele Rossi, Carlo Steiner, Cecilia Metra
51
Voted
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
15 years 4 months ago
Disclosing the LDPC code decoder design space
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
Torben Brack, Frank Kienle, Norbert Wehn