We present a de-layered protocol engine for termination of 40Gbps TCP connections using a reconfigurable FPGA silicon platform. This protocol engine is designed for a planned att...
: Printing in a Digital Age Qian Lin, Jerry Liu, Daniel Tretter HP Laboratories HPL-2010-113 Paper has been used as an information medium for almost two thousand years. But dur...
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
— Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these...
Ernesto Wandeler, Alexander Maxiaguine, Lothar Thi...