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DATE
2006
IEEE
132views Hardware» more  DATE 2006»
15 years 6 months ago
Energy reduction by workload adaptation in a multi-process environment
Reducing energy consumption is an important issue in modern computers. Dynamic power management (DPM) has been extensively studied in recent years. One approach for DPM is to adju...
Changjiu Xian, Yung-Hsiang Lu
DATE
2006
IEEE
129views Hardware» more  DATE 2006»
15 years 6 months ago
Non-gaussian statistical interconnect timing analysis
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
104
Voted
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 6 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
DATE
2006
IEEE
91views Hardware» more  DATE 2006»
15 years 4 months ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
DATE
2006
IEEE
124views Hardware» more  DATE 2006»
15 years 6 months ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada