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2006
IEEE
140views Hardware» more  DATE 2006»
15 years 6 months ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
15 years 6 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
15 years 6 months ago
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures
Temporal partitioning techniques are useful to implement large and complex applications, which can be split into partitions in FPGA devices. In order to minimize resources, each o...
Paulo Sérgio B. do Nascimento, Manoel Euseb...
DATE
2006
IEEE
78views Hardware» more  DATE 2006»
15 years 6 months ago
STAX: statistical crosstalk target set compaction
This paper presents STAX, a crosstalk target set compaction framework to reduce the complexity of the crosstalk ATPG process by pruning non-fault-producing targets. In general, ex...
Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta,...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 6 months ago
Software-friendly HW/SW co-simulation: an industrial case study
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
Juanjo Noguera, Luis Baldez, Narcis Simon, Lluis A...