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83
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DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 6 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
88
Voted
DATE
2006
IEEE
93views Hardware» more  DATE 2006»
15 years 6 months ago
Restructuring field layouts for embedded memory systems
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
15 years 6 months ago
Design and test of fixed-point multimedia co-processor for mobile applications
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo
77
Voted
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 6 months ago
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
117
Voted
DATE
2006
IEEE
102views Hardware» more  DATE 2006»
15 years 6 months ago
A systematic IP and bus subsystem modeling for platform-based system design
The topic on platform-based system modeling has received a great deal of attention today. One of the important tasks that significantly affect the effectiveness and efficiency of ...
Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-...