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2008
IEEE
117views Hardware» more  DATE 2008»
15 years 7 months ago
A Scalable Algorithmic Framework for Row-Based Power-Gating
Leakage power is a serious concern in nanometer CMOS technologies. In this paper we focus on leakage reduction through automatic insertion of sleep transistors for power gating in...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
15 years 7 months ago
Symbolic Reliability Analysis and Optimization of ECU Networks
Increasing reliability at a minimum amount of extra cost is a major challenge in todays ECU network design. Considering reliability as an objective already in early design phases ...
Michael Glaß, Martin Lukasiewycz, Felix Reim...
112
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DATE
2008
IEEE
226views Hardware» more  DATE 2008»
15 years 7 months ago
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation
Abstract— We present a general method to evaluate RF BuiltIn Self-Test (BIST) techniques during the design stage. In particular, the adaptive kernel estimator is used to construc...
Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, ...
90
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DATE
2008
IEEE
114views Hardware» more  DATE 2008»
15 years 7 months ago
Operating System Controlled Processor-Memory Bus Encryption
—Unencrypted data appearing on the processor– memory bus can result in security violations, e.g., allowing attackers to gather keys to financial accounts and personal data. Al...
Xi Chen, Robert P. Dick, Alok N. Choudhary
DATE
2008
IEEE
109views Hardware» more  DATE 2008»
15 years 7 months ago
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad...