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2009
IEEE
106views Hardware» more  DATE 2009»
15 years 4 months ago
Debugging of Toffoli networks
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...
Robert Wille, Daniel Große, Stefan Frehse, G...
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DATE
2009
IEEE
149views Hardware» more  DATE 2009»
15 years 4 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
15 years 4 months ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 4 months ago
Communication minimization for in-network processing in body sensor networks: A buffer assignment technique
—Body sensor networks are emerging as a promising platform for healthcare monitoring. These systems are composed of battery-operated embedded devices which process physiological ...
Hassan Ghasemzadeh, Nisha Jain, Marco Sgroi, Roozb...
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
15 years 4 months ago
A file-system-aware FTL design for flash-memory storage systems
Abstract—As flash memory became popular over various platforms, there is a strong demand on the performance degradation problem, due to the special characteristics of flash mem...
Po-Liang Wu, Yuan-Hao Chang, Tei-Wei Kuo