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DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
This paper presents a scalable method to generate close to minimal size test pattern sets for stuck-at faults in scan based circuits. The method creates sets of potentially compat...
DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
D-NUCA L2 caches are able to tolerate the increasing wire delay effects due to technology scaling thanks to their banked organization, broadcast line search and data promotion/dem...
DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
In this paper, we propose a preprocessing method to improve Side Channel Attacks (SCAs) on Dual-rail with Precharge Logic (DPL) countermeasure family. The strength of our method i...
DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...