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2009
IEEE
135views Hardware» more  DATE 2009»
16 years 5 days ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting ...
Valentin Gherman, Samuel Evain, Mickael Cartron, N...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
15 years 9 months ago
Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips
1 Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. How...
Mikael Väyrynen, Virendra Singh, Erik Larsson
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DATE
2009
IEEE
119views Hardware» more  DATE 2009»
15 years 8 months ago
Predictive models for multimedia applications power consumption based on use-case and OS level analysis
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
Patrick Bellasi, William Fornaciari, David Siorpae...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
16 years 5 days ago
A co-design approach for embedded system modeling and code generation with UML and MARTE
—In this paper we propose a UML/MDA approach, called MoPCoM methodology, to design high quality real-time embedded systems. We have defined a set of rules to build UML models fo...
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, P...
DATE
2009
IEEE
93views Hardware» more  DATE 2009»
16 years 5 days ago
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Ha...