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2010
IEEE
160views Hardware» more  DATE 2010»
15 years 5 months ago
IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults
—With the advancement of CMOS manufacturing process to nano-scale, future shipped microprocessors will be increasingly vulnerable to intermittent faults. Quantitatively character...
Songjun Pan, Yu Hu, Xiaowei Li
DATE
2010
IEEE
121views Hardware» more  DATE 2010»
15 years 5 months ago
Properties of and improvements to time-domain dynamic thermal analysis algorithms
—Temperature has a strong influence on integrated circuit (IC) performance, power consumption, and reliability. However, accurate thermal analysis can impose high computation co...
Xi Chen, Robert P. Dick, Li Shang
DATE
2010
IEEE
185views Hardware» more  DATE 2010»
15 years 5 months ago
Fault diagnosis of analog circuits based on machine learning
— We discuss a fault diagnosis scheme for analog integrated circuits. Our approach is based on an assemblage of learning machines that are trained beforehand to guide us through ...
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvado...
DATE
2010
IEEE
162views Hardware» more  DATE 2010»
15 years 5 months ago
Error resilience of intra-die and inter-die communication with 3D spidergon STNoC
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Ricca...
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
15 years 5 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni