—Associated with the ever growing integration scales is the increase in process variability. In the context of networkon-chip, this variability affects the maximum frequency that...
Abstract—Behavioral synthesis is the compilation of an Electronic system-level (ESL) design into an RTL implementation. We present a suite of optimizations for equivalence checki...
—Safety-critical automotive systems must fulfill hard real-time constraints for reliability and safety. This paper presents a case study for the application of an AUTOSARbased l...
Kay Klobedanz, Christoph Kuznik, Andreas Thuy, Wol...
—Inductive and capacitive coupling are responsible for slowing down signals. Existing bus encoding techniques tackle the issue by avoiding certain types of transitions. This work...
— We propose a methodology for Boolean matching under permutations of inputs and outputs (PP-equivalence checking problem) — a key step in incremental logic design that identif...