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DFT
2003
IEEE
79views VLSI» more  DFT 2003»
15 years 2 months ago
Hybrid BIST Using an Incrementally Guided LFSR
A new hybrid BIST scheme is proposed which is based on using an “incrementally guided LFSR.” It very efficiently combines external deterministic data from the tester with on-c...
C. V. Krishna, Nur A. Touba
DFT
2003
IEEE
114views VLSI» more  DFT 2003»
15 years 2 months ago
CodSim -- A Combined Delay Fault Simulator
Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they only model a subset of delay defect behaviors. To solve this ...
Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, We...
IPPS
2003
IEEE
15 years 2 months ago
Short Vector Code Generation for the Discrete Fourier Transform
In this paper we use a mathematical approach to automatically generate high performance short vector code for the discrete Fourier transform (DFT). We represent the well-known Coo...
Franz Franchetti, Markus Püschel
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
15 years 2 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
DFT
2003
IEEE
100views VLSI» more  DFT 2003»
15 years 2 months ago
Scan-Based BIST Diagnosis Using an Embedded Processor
For system-on-chip designs that contain an embedded processor, this paper present a software based diagnosis scheme that can make use of the processor to aid in diagnosis in a sca...
Kedarnath J. Balakrishnan, Nur A. Touba