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CODES
2007
IEEE
15 years 11 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
ICPP
2007
IEEE
15 years 11 months ago
Multi-Layer Event Trace Analysis for Parallel I/O Performance Tuning
The complexity of parallel I/O systems lies in the deep I/O stack with many software layers and concurrent I/O request handling at multiple layers. This paper explores multi-layer...
Pin Lu, Kai Shen
IEEEPACT
2007
IEEE
15 years 11 months ago
The OpenTM Transactional Application Programming Interface
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
Woongki Baek, Chi Cao Minh, Martin Trautmann, Chri...
KBSE
2007
IEEE
15 years 11 months ago
Effective memory protection using dynamic tainting
Programs written in languages that provide direct access to memory through pointers often contain memory-related faults, which may cause non-deterministic failures and even securi...
James A. Clause, Ioannis Doudalis, Alessandro Orso...
MEMOCODE
2007
IEEE
15 years 11 months ago
MEMOCODE 2007 Co-Design Contest
New to the 2007 MEMOCODE conference is the HW/SW Co-Design Contest. Members of the technical and steering committees from MEMOCODE 2006 thought that the co-design practice is dist...
Forrest Brewer, James C. Hoe